The present invention relates generally to semiconductor structures and more specifically to an improved semiconductor structure which is capable of conductivity modulation.
High voltage sustaining capability in a semiconductor device is usually achieved by use of a high resistivity region in the device in which most of the high sustaining voltage is handled. A disadvantage of this approach is that when current is flowing through the device a large voltage drop occurs in the high resistivity region since its bulk resistance is inversely proportional to its resistivity. In the prior art, the on resistance has been reduced by conductivity modulation of the high resistivity drain region. The minority carriers which modulate the drain resistivity are introduced by an integral PN diode which is in series with the drain. A top contact version of an NMOS embodying these principles is shown in FIG. 1. The P+ region labeled anode injects holes into the N drain region whose conductivity they increase. This structure is shown in FIG. 10 of U.S. Pat. No. 4,199,774 to Plummer.
There are several problems with this structure. One results from the presence of the anode (for N channel) or cathode (for P channel) which introduces a diode offset and non-linear small signal resistance to the zero offset linear resistance of the basic MOS device. The other arises from the parasitic SCR embedded in the structure. In FIG. 1, the SCR has P+ anode as anode, N bulk as N base, P body as NPN base and N source as cathode. At high current, the lateral voltage drops in the P body developed by the flow of collected holes to the body contact (injected by the anode) forward biases a portion of the N+ source to P body junction, thereby turning on the parasitic SCR. Once on, the SCR cannot be turned off by the MOS gate, thus defeating a major feature of the structure.
Thus, it is an object of the present invention to provide an insulated gate field effect transistor capable of sustaining high voltages with reduced latch sensitivity.
Another object of the present invention is to provide an insulated gate field effect transistor having modulated drain on resistance.
Yet another object of the present invention is to provide an insulated gate field effect transistor capable of withstanding high reverse blocking voltages.
Still another object of the present invention is to provide a conductivity modulated MOS structure with reduced latch up sensitivity which may be formed in an integrated circuit or as discreet devices.
An even further object of the present invention is to provide an SCR structure having an increased, controllable turn-off gain.
A still even further object of the present invention is to provide a diode structure having a lower turn-on voltage than a junction diode and a lower series resistance than a Schottky diode.
These and other objects of the invention are attained by providing a minority carrier diode and a majority carrier diode in the drain region with the minority carrier diode modulating the current path of the majority carrier diode. The diodes may be formed in a common surface of the drain region with the body and source region or may be formed on an opposed surface of the drain region. The minority carrier diode and the majority carrier diode may receive a common signal in which case the majority carrying diode should have a lower turn-on voltage than the minority carrying diode. The signal applied to the minority carrying diode should be less than the value which will produce latch up of the insulated gate field effect transistor structure. The minority carrier diode is positioned between the majority carrier diode and the body region. The majority diode may be formed as a Schottky diode or as a semiconductor junction diode.
Another embodiment is capable of current modulation using a minority carrier injecting diode and a separate drain contact. In this example, a drain contact is formed in the drain adjacent to the channel portion of the body. The anode of the minority carrier diode is formed in the drain region and is separated from the source region, formed in the body region, by the body contact. Here the insulated gate field effect transistor structure operates as a conventional transistor until a drain-to-source voltage greater than the voltage drop of the minority diode is reached. The diode begins to conduct and further increase of current flow will be through the diode. Since the source region is remote from the anode and separated by the body contact, very high anode current density can be handled without latch up.
An SCR structure having an increased, controllable turn-on gain is formed by providing a minority carrier diode and a majority carrier diode in the third layer of a four-layer device. The minority carrier diode is positioned between the second layer and the majority carrier diode and modulates the current path of the majority carrier diode.
A low turn-on voltage, low resistance diode is formed by providing a minority carrier junction in a substrate between the surface substrate contact and the majority carrier junction in the substrate. The majority carrier diode has a lower turn-on voltage and, thus, operates as a low turn-on diode until the voltage in the substrate reaches a point to which the minority carrier diode turns on. The minority carrier diode reduces the resistance by conductivity modulation.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.